The limitations of transistor scaling and the rise of power-constrained compute environments have driven a new renaissance in hardware design through hardware acceleration. Application and domain-specific hardware accelerators offer fantastic efficiencies over traditional, general-purpose processors and are seeing extensive use in applications ranging from embedded platforms to high-performance cloud computing clusters.Developing new hardware accelerators comes at a great cost in terms of both time and engineering effort. It is greatly outpaced by rapidly evolving algorithmic developments, particularly in emergent domains like AI and deep learning. Hardware developers need new, more agile tools to aid in both simulation and integration of hardware accelerators in modern systems.To aid in the integration and optimization of application-specific memories for hardware accelerators this work presents two automated solutions based on the Low Level Virtual Machine (LLVM) compiler infrastructure. These solutions explore static data access characteristics of applications to guide hardware designers in optimizing memory hierarchy prior to hardware synthesis. They are also compatible with existing synthesis tool-chains to enable some automated memory optimizations when synthesizing accelerator designs.This work also introduces a new design space exploration tool for application and domain-specific accelerators in the form of the gem5-SALAM simulator. This simulator provides high fidelity modeling of accelerator power and performance within a full system simulation. It also significantly reduces the amount of time and effort needed to explore the system design space for accelerators versus traditional hardware design flows.Lastly the work presented as part of gem5-SALAM's revision introduces a new set of simulation abstractions for redefining how simulation models are written for event-driven simulators. These abstractions address the fundamental design challenge of decoupling simulated functionality from timing and concurrency constraints, while maintaining full compatibility and interoperability with the popular open-source simulation framework gem5.