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Best Practices for Building Hardware Designs for Living Computational Science Applications
Title
Best Practices for Building Hardware Designs for Living Computational Science Applications
Author
Pottathuparambil, Robin
Date Created
2013
Subjects--Topical
Electrical engineering, Computer engineering
Description
Scientific computing or Computational science, is a field of study where engineers and scientists use computer simulations to solve equations that model the physical world. In some cases, these equations come from the first principles of physics. ...
Bridging the gap between heterogeneous computing and next generation memory architecture using high level synthesis
Title
Bridging the gap between heterogeneous computing and next generation memory architecture using high level synthesis
Author
Rajagopala, Abhilash
Date Created
2019
Subjects--Topical
Electrical engineering, Computer engineering
Description
The impact of transistor scaling on FPGAs is changing the role of FPGA from accelerators to a major role as processors. With this rapid development and the ability to implement complex systems on FPGAs, the conventional hardware language design fl...
Design and validation of a scalable digital wireless channel emulator using an FPGA computing cluster
Title
Design and validation of a scalable digital wireless channel emulator using an FPGA computing cluster
Author
Buscemi, Anthony
Date Created
2013
Subjects--Topical
Electrical engineering, Computer engineering
Description
A Digital Wireless Channel Emulator (DWCE) is a system that is capable of emulating the RF environment for a group of wireless devices. The use of digital wireless channel emulators with networking radios is hampered by the inability to efficientl...
Memory Efficiency Implications on Sparse Matrix Operations
Title
Memory Efficiency Implications on Sparse Matrix Operations
Author
Jain, Shweta
Date Created
2014
Subjects--Topical
Electrical engineering, Computer engineering
Description
Sparse Matrices are very large matrices with very few nonzero elements and operations on sparse matrices are central to many numerical and graph algorithms. The fundamental bottleneck in these operations is the usage of specialized storage formats...
Productively scaling hardware designs over increasing resources using a systematic design analysis approach
Title
Productively scaling hardware designs over increasing resources using a systematic design analysis approach
Author
Schmidt, Andrew
Date Created
2011
Subjects--Topical
Electrical engineering, Computer engineering
Description
As processor development shifts from strict single core frequency scaling to het- erogeneous resource scaling two important considerations require evaluation. First, how to design systems with an increasing amount of heterogeneous resources, and s...
PyDac: a distributed runtime system and programming model for a heterogeneous many-core architecture
Title
PyDac: a distributed runtime system and programming model for a heterogeneous many-core architecture
Author
Huang, Bin
Date Created
2014
Subjects--Topical
Computer engineering
Description
Heterogeneous many-core architectures that consist of big, fast cores and small, energy-efficient cores are very promising for future high-performance computing (HPC) systems. These architectures offer a good balance between single-threaded perfor...