Search results

  • CSV Spreadsheet
  • RSS Feed
(61 - 70 of 70)
Scalable Hardware Accelerator Design for FPGA Platforms
Secure Key Updates for Dynamically Reconfigurable Logic Locked Designs
Secure Key Updates for Dynamically Reconfigurable Logic Locked Designs
Social and Location Based Routing in Delay Tolerant Networks
Software memory controller design: Issues and Challenges
Software-defined networking based testbed for evaluating cyber-attacks and defense strategies using FPGA
Statistical Machine Learning based Modeling Framework for Design Space Exploration and Run-time Cross-stack Energy Optimization for Many-core Processors
The Case for a Hardware Filesystem
Thread Mapping Using System-Level Model for Shared Memory Multicores
UTILIZATION OF WIRELESS SIGNAL STRENGTH FOR MOBILE ROBOT LOCALIZATION IN INDOOR ENVIRONMENTS